FIG. 1 shows a conventional bipolar junction transistor (BJT), which typically includes an emitter, a collector, an active base, and an extrinsic base. The collector is formed in the surface of a semiconductor substrate between a pair of shallow trench isolation (STI) regions, which electrically isolates the collector of the BJT from other device structures located in the substrate surface. The active base, typically formed of silicon and silicon germanium, is located above the collector but underneath the emitter, and it is in mechanical and electrical contact with both the collector and emitter. The extrinsic base, which is adjacent to the emitter, is located over a portion of the active base and portions of the STI regions. The emitter is typically a T-shaped emitter. A shoulder section of such a T-shaped emitter is located over the extrinsic base region, while a leg section thereof extends through the extrinsic base and contacts an upper surface of the active base. The emitter and the extrinsic base are electrically isolated from each other by an insulator layer (IS) and sidewall spacers (SP).
The base-to-collector capacitance of such a conventional BJT is the sum of: (1) the capacitance between the active base and the collector inside the active area (which is defined by the emitter opening), (2) the capacitance between the active and extrinsic bases and the collector outside the active area and within the STI regions, and (3) the capacitance between the extrinsic base and the collector across the STI regions, as shown in FIG. 1.
The base-to-collector capacitance has a significant influence on the cut-off frequency (fT) and the maximum oscillation frequency (fmax) of the BJT device, which are the most representative measures for the operation speed of the BJT device. Therefore, minimization of the base-to-collector capacitance can effectively improve the operation speed of the BJT device.
The extrinsic component of the base-to-collector capacitance, which is the capacitance between the active/extrinsic bases and the collector outside the active area and which is typically referred to as the parasitic capacitance, comprises more than half of the total base-to-controller capacitance. Therefore, reduction of the parasitic capacitance will lead to significant improvement of fT and fmax and will effectively increase the operation speed of the BJT device.
Because the parasitic capacitance of the BJT device is caused by the overlap between the active/extrinsic bases and the collector outside the active area, one possible approach for reducing the parasitic capacitance is to reduce such a base-collector overlap. However, minimization of the base-collector overlap is difficult for two reasons: (1) the lithographic process typically used for fabricating the active/extrinsic bases is limited by overlay and alignment tolerances, and (2) by decreasing the extrinsic overlap area, there is a corresponding increase in base resistance, which is another key factor that affects the performance of BJTs.
There is therefore a need for improved BJT structures that are characterized by reduced parasitic capacitances, without the corresponding reduced base resistance. There is also a need for methods of fabricating such improved BJT structures with high precision at reduced costs.